(Yicai) July 26 -- Central Chinese city of Wuhan has formed a new innovation hub for RISC-V, an open-source instruction set architecture used to design chips.

The hub will commit to advancing the development of RISC-V, pronounced as risk five, in the era of artificial intelligence to build a system of innovation and security, Yicai learned during a forum held in Wuhan today.

Initiated by the United States over 10 years ago, RISC-V is an open-source type of interface between the hardware and software of a computer that could break the dominance of Intel's x86 and Arm Holdings' architectures in mainstream central processing units. RISC-V is based on the concept of reduced instruction set computing, referring to simplified instructions that increase efficiency, and make it more modular and scalable than other options.

From this year to 2030, processors based on RISC-V ISA will have an almost 50 percent increase in shipments per year, forecasts from consultancies Omdia and SHD Group show. By 2030, shipments of such processors should reach 17 billion units, making up nearly one-fourth of the total central processing units, reaching a total income of USD92 billion.

Other cities such as Shanghai, Beijing, Zhejiang province's Hangzhou, and Guangdong province's Zhuhai are also actively advancing the setup of local RISC-V innovation centers, Yicai learned.

The new Wuhan center will formulate specifications, test products, demonstrate engineering prowess, and promote different applications to enhance RISC-V products, system capabilities, and industrial development, experts said at the forum.

The openness of the RISC-V ISA enables more firms and research bodies to join the ecosystem, speeding up tech iterations and upgrading, Liu Sheng, a member of the Chinese Academy of Sciences, said in a speech at the event. The modular design enables customization and optimization based on actual needs, resulting in notable resource savings, he added.

The Chinese market is a key force for the development of the RISC-V ecosystem, said Duo Jing, executive secretary-general at the China Electronics Standardization Institute. Some of the reasons are that Chinese firms have broadly participated in building industry standards while the market is bigger than any other as China has shipped more than half of all chips using RISC-V ISA worldwide in the past few years and also because the domestic application scenarios are very diversified, Duo explained.

At the forum, Wang Dongsheng, chairman of Beijing-based RISC-V developer Eswin, for the first time proposed the concept of a digital RISC-V infrastructure, encompassing the underlying chip, hardware, software, scenario-based solutions, and other new-generation digital infrastructure products.

Editors: Tang Shihua, Emmi Laine